Airiau, Roland
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Hardcover
Edition: Series#:261; Natural Language Processing and Machine Translation
240 pages
Index
Published: 1994
Publisher: Kluwer Academic Publishers Group
ISBN / EAN: 0792394291
This study is an introduction to the use of VHDL logic (RTL) synthesis tools in circuit design. The modelling styles proposed are independent of specific market tools and focus on constructs widely recognized as synthesizable by synthesis tools.
